From 0ec0f3f1918607dfe77dd8adbc0a319cc4fad0b9 Mon Sep 17 00:00:00 2001 From: Lars-Dominik Braun Date: Tue, 20 May 2014 16:11:18 +0200 Subject: timer: Switch to 16 bit timer (timer1) --- timer.c | 55 +++++++++++++++++++++---------------------------------- 1 file changed, 21 insertions(+), 34 deletions(-) diff --git a/timer.c b/timer.c index c78ebda..3565764 100644 --- a/timer.c +++ b/timer.c @@ -1,36 +1,17 @@ #include #include +#include "common.h" #include "timer.h" -volatile unsigned char count = 0; +/* counts one second, off by +1s per 2m + */ + +volatile uint16_t count = 0; volatile unsigned char hit = 0; -/* XXX: use high-res timer1 for doing this - */ -ISR(TIMER0_OVF_vect) { - /* there seems to be no mode of operation which disconnects pin OC0A _and_ - * clears the value */ - ++count; - switch (count) { - case 1: - case 2: - TCNT0 = 0; - break; - - /* three overflows happened, next one is a little shorter: - * F_CPU/prescaler-3*256=208.5625 -> 256-208=48 -> zero-based=47 */ - case 3: - TCNT0 = 47; - break; - - /* one second elapsed */ - case 4: - TCNT0 = 0; - count = 0; - ++hit; - break; - } +ISR(TIMER1_COMPA_vect) { + ++hit; } bool timerHit () { @@ -42,17 +23,23 @@ bool timerHit () { void timerStart () { count = 0; /* reset timer value */ - TCNT0 = 0; - /* set normal mode timer0 */ - TCCR0A = 0; - /* enable overflow interrupt */ - TIMSK0 = (1 << TOIE0); - /* io clock with 1024 prescaler */ - TCCR0B = (TCCR0B & ~((1 << CS01)) | (1 << CS02) | (1 << CS00)); + TCNT1 = 0; + /* set ctc (compare timer and clear) mode (part 1) */ + TCCR1A = 0; + /* enable compare match interrupt */ + TIMSK1 = (1 << OCIE1A); + /* set compare value */ +#if F_CPU == 8000000 + OCR1A = 7812; +#else +#error "cpu speed not supported" +#endif + /* io clock with 1024 prescaler; ctc (part 2) */ + TCCR1B = (1 << CS12) | (1 << CS10) | (1 << WGM12); } void timerStop () { /* zero clock source */ - TCCR0B = 0; + TCCR1B = 0; } -- cgit v1.2.3