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authorLars-Dominik Braun <lars@6xq.net>2014-04-08 11:28:54 +0200
committerLars-Dominik Braun <lars@6xq.net>2014-04-22 16:51:13 +0200
commit68c180f2aba4471483e1786556c2bc2a94a7d2a7 (patch)
tree13fd0790193e9e9fe8a745b58cfe34bc108b9b22 /accel.c
parente3897565c342bee4765f921240b7ca91cd9b23f1 (diff)
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Increase CPU and UART speed
Re-enable interrupt based accel.
Diffstat (limited to 'accel.c')
-rw-r--r--accel.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/accel.c b/accel.c
index 670121e..b58f7f7 100644
--- a/accel.c
+++ b/accel.c
@@ -67,7 +67,7 @@ bool accelProcess () {
reading = false;
}
} else {
- if (/*drdy &&*/ twr.status != TWST_WAIT) {
+ if (drdy && twr.status != TWST_WAIT) {
/* new data available in device buffer and bus is free, we are
* reading the registers inbetween out_x/y/z and ignore them */
if (!twRequest (TWM_READ, LIS302DL, LIS302DL_UNUSED1, (uint8_t *) val, 6)) {